Rather than make a big post every few weeks, I’m going to try and make smaller posts more frequently. The large posts take quite a bit of time and effort to write, so hopefully breaking things up into smaller chunks will make this process easier and encourage me to keep posting. We’ll see how it goes!
I decided to put away the high voltage for a while and focus back on something more familiar to me: digital electronics. I’ve done quite a bit of programming on microcontrollers, but haven’t really delved into FPGAs apart from a VHDL class I took in grad school. My end goal is to implement an FFT on an FPGA. Doing complex math and trig functions on an FPGA is going to be brutal, but hey, engineers tends to be masochists!
Before diving into the FFT, I wanted to start with an easy project to get familiar with the hardware I have. Ages ago, I bought a Papilio One 500K, which is based on the Xilinx Spartan-3E FPGA. It has 48 I/O lines, dual channel USB, integrated JTAG programmer, 4 power supplies, and a power connector. I think you can still purchase one from papilio.cc. There are probably better solutions available by now.
I thought, what better way to start than with blinking an LED! This fairly useless task is actually quite a bit more complicated to implement on an FPGA than a microcontroller since HDLs (hardware descriptor languages) are more at home with concurrent circuits rather than sequential circuits. I will be using VHDL for my projects.
First of all, sorry for posting an image of the code. Unfortunately, the free version of WordPress doesn’t have the ability to properly format VHDL code, so I have to post an image. I actually based my example on the code found here. In the future, I will be posting my VHDL files at the bottom of the post.
I’ll briefly explain what is going on. There is only one input and one output. The input is the clock signal and the output is the pin driving the base of an NPN transistor which turns on the LED. In the process block, I’ve initialized a counter that runs from 0 to max_count. I have chosen max_count to be 1/10 of the clock frequency (32MHz) so that the LED will blink ten times per second. On the rising edge of each clock cycle, the counter is incremented. For the first max_count/2 cycles, the LED is ON. For the last half of the cycles, the LED is off. Once count = max_count, the counter is reset.
Not like this really needs a video, but here it is! I’m using a 2N3904 NPN transitor to drive the LED so I don’t have to worry about the current limitations of the I/O lines on the FPGA.